Reiley followed the research interest: Arizona State University
Reiley PhD in Computer Science, Specializing in computer architecture and compiler optimizations for power efficiency and reliability in embedded systems. Interested in Research positions at challenging R&D Labs working on related research.
Reiley added 5 papers
Graduate Student, School of Computing Informatics, and Design Systems Engineering
Research Associate
Compiler Microarchitecture Lab, SCIDSE, ASU
Thesis Title: Compiler Techniques for Power Efficiency and Reliability in Embedded Systems
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Aviral Shrivastava
Charlie Colbourn Sarma Vrudhula Lawrence T. Clark |
About
He is a Candidate for a Doctoral degree in Computer Science, under the advisory of Prof. Aviral Shrivastava, from the School of Computing Informatics and Decision Systems Engineering, ASU.
Reiley graduated from the University of Madras, India with a bachelors degree in engineering in 2004, and joined L&T Infotech, India as a software engineer. He then received his MS degree in Electrical Engineering in 2008. He has been associated with the Compiler Microarchitecture Lab, SCIDSE, ASU, as a Research Associate since Aug 2006.
His primary research focus is in developing compiler-based solutions to improve embedded system reliability through analytical modeling and analysis of the processor microarchitecture. His other areas of interest include: developing compiler solutions to enable the efficient use of CGRAs and such power-efficient many-core architectures; and developing hybrid compiler-architecture solutions to reduce embedded system power consumption.
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